Design and Simulation of FPGA-Based Power Efficient Advanced Traffic Light Controller

Authors:G. SWARNALATHA, CH. RAMESH

0068-0070

Advanced Design of Degaussing Electronics for Ring Laser Gyroscope (Ships, Submarines & Missiles)

Authors:B. MANEESHA, K. RAVI BABU

0071-0076

Design of 1-Bit ALU using Modified DR Gate

Authors:PADHIRTHA DIVYA, GANGA RAMESH JAKKAMSETTI

0077-0081

A Novel Area Efficient VLSI Architecture for Hard Decision Viterbi Decoder

Authors:B.LAVANYA, K.PASIPALANA RAO

0082-0085

Modern 16-Bit VMFU Design using Power Suppression Technique for Signal Processing/Hypermedia Applications

Authors:MORYSHOBAN, BAIRIHARIKRISHNA

0086-0091

Design of an Efficient Binary Adder in QCA

Authors:M. VIJAYALAKSHMI, P. SURESH

0092-0098

Hardware Implementation of Configurable Booth Multiplier on FPGA

Authors:KISHORE SHINDE, DR. A. K. KURESHI

0099-0103

Design of Testable Shift Registers using Reversible Logic Gates

Authors:DEVIREDDY VENKATARAMI REDDY, SK. SUBHAN, G. TIRUMALA REDDY

0104-0107

Novel Implementation of BIST Technique for High Fault Coverage in UART

Authors:BANALA SAI ARUN KUMAR, S.P.SURESH NAIK

0108-0111